Fast and Approximate processing unit for 2D Discrete Cosine System

The recent time witnesses a tremendous need for high performance digital signal Processing (DSP) systems for high end emerging applications like HD-TV, medical imaging, satellite communication, 3G mobile technologies etc. For all these applications, the sources of data are video signals. For transmission of video signals significant amount of bandwidth required. Since the captured video data contain huge amount of redundant data, there is an opportunity for video data compression keeping the picture quality intact. DCT is a well known technique used in video or image compression. DCT algorithms are computation intensive and involve large number of multiplication and addition operations. Therefore, with the increase in number of length of the DCT,the number of multiplication and addition operations also increase leading to larger chip area and performance degradation. The primary aspect of the 2-D DCT computation is to compute the DCT coefficients, where a large number of mathematical computations are required. This work is implemented on Matlab and hardware level by using of Verilog hardware language. Many researchers provided different architectures targeting area or speed or throughput with non scalable approach for computation..